First-level areas：Information Technology
First-level areas：Information Technology
Source：Social Recruitment
Job description ：
Job Responsibilities.
1. Responsible for requirement analysis, architecture design, solution design, implementation, and other related tasks for specialized chips in ATE testing equipment;
2. Responsible for building and managing a chip design team;
3. Responsible for conducting pre research on relevant cutting-edge work, learning and understanding competitor designs.
Job requirements.
1. PhD degree, majoring in semiconductor microelectronics, integrated circuits, and communication electronics;
2. Have a deep understanding of the entire process of chip design and testing;
3. Have design experience in clock and delay line technology;
4. Have a deep understanding of FPGA chip design and usage;
5. Proficient in chip design EDA tools.
Research direction.
The design of specialized chips for testing machines, such as DPSIC (device power supply IC), PEIC (Pin electronic IC), PG (Pattern Generator), TG (Timing Generator), etc., includes low-voltage high current analog design, digital logic design, clock design, high-speed high-resolution delay line (5ps) design, high-speed driver and comparator design, etc.

Please send your CV or resume as an attachment to the following email address:
mailto: rbhr@hrcenter.co.uk
With the subject line formatted as: ‘Name + Position + Company Name + Location’.